Navabi, Zainalabedin <br/><br/>
Verilog digital system design: RT level synthesis, testbench and verification 
Zainalabedin Navabi 
 - 2nd 
 - New Delhi  McGraw Hill Education (India)  2014 
 - xvi, 344+One CD-ROM 
<br/><br/> Includes bibliographical references and index 
<br/><br/><label>ISBN: </label>9780070252219 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Digital electronics-computer aided design<br/>Logic Circuits-Computer aided design
<br/><br/><label>Dewey Class. No.: </label>621.395  / NAV P14