000			00637nam a2200205Ia 4500
008			230515s9999||||xx |||||||||||||| ||und||
020			_a9788126519316
040			_aMAIN
041			_aEnglish
082			_a621.395 _bPAD P17
100			_aPadmanabhan, T.R.
245		0	_aDesign through Verilog HDL _cT.R. Padmanabhan
250			_aWiley student
260			_aHoboken, NJ; New Delhi _bJohn Wiley; Wiley India [Printer] _c2017
300			_axii, 455
500			_aIncludes bibliographical references and index
650			_aDigital electronics-Computer aided design
650			_aLogic Circuits-Computer aided design
942			_cBK
999			_c9783 _d9783